L1 instruction cache: 32 KB, 4-way set associative (128 sets), 64 byte lines, shared by 1 processor. L1 data cache: 32 KB, 4-way set associative (128 sets), 64 byte lines, shared by 1 processor. L3 data cache: 512KB, 16-way set associative (512 sets), 64 byte lines, shared by 4 processors.
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